1. Field of the Invention:
The present invention relates to a voltage comparator circuit comprised of complementary insulated-gate field effect transistors (CMOST's), and more particularly, to a voltage comparator integrated circuit which is suited for comparing two voltages having a small difference.
2. Prior Art:
A prior art voltage comparator circuit comprised of CMOST's in the form of an integrated circuit essentially contains a differential amplifier receiving two voltages to be compared and subsequent stages of amplifier circuits amplifying the output of the differential amplifier to obtain a comparison output with a predetermined voltage level.
In the prior art voltage comparator circuit, however, the amplification stages must be increased for obtaining a large amplification factor where the input voltage level is small. It results in an increase in the occupying area in the integrated circuit chip and an increase in an amount of the electric power consumption. Furthermore, there is no assurance that the differential amplifier of the initial stage removes the in-phase voltage component. That is, as the in-phase component in the input voltage signals changes, the output voltage produced by the differential amplifier circuit undergoes the change which is then amplified through amplifiers of the subsequent stages. When the voltage difference of smaller than 1 mV is input, the state of logic "1" and the state of logic "0" may often be erroneously inverted by each other in the output produced by the final stage, depending upon the inphase voltage component. The same phenomenon also takes place when the power supply voltage changes. When the inphase voltage component greatly changes in the input voltage signals, or when the power supply contains much noise, the prior art voltages comparator circuit is no more caoable of comparing the input voltages having a voltage difference smaller than 1 mV. Further, what is most important is that it is very difficult to make the central potential point of the operating voltage of the differential amplifier into coincidence with the central potential point of the operating voltage of the amplifier of the subsequent stage. With the conventional technique, these central potential points deviate by several hundred millivolts and cause an input offset voltage of about 10 mV. It has been impossible to control this offset voltage by the conventional technique. The input voltage signals therefore are compared with the offset voltage contained therein, and hence accurate comparison of the input voltage signals cannot be achieved.
Another technique of comparing voltages is proposed by Andrew G. F. Dingwall in International Solid-State Circuit Conference 79 (1979, ISSCC, Digest of Technical Papers, pp. 126). This circuit, however, has a defect in that it is very susceptible to a power supply noise.